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Registration: 16.06.2025
Jinanand A
Specialization: Electronics and Communication Engineering
Skills
Verilog
C++
LTSpice
Xilinx
Vivado
Ansys EDT
Work experience
Electronics and Communication Engineering
08.2024 - 05.2025 |Blood Glucose level Detector-Final Year Project
Ansys EDT
Electronics and Communication Engineering
01.2023 - 05.2023 |Automatic Gain Control
Verilog, C++
Electronics and Communication Engineering
01.2023 - 05.2023 |Digital Clock / Timer
Verilog, C++
Educational background
Electronics and Communication Engineering (Bachelor’s Degree)
2021 - 2025
National Institute of Technology Calicut
Languages
EnglishProficient